In the arena of Parasitic-Aware Design of CMOS RF Circuits, efforts are aimed at the realization of true single-chip radios with few, if any, off-chip components. Ironically, the on-chip passive components required for RF integration pose miore serious challenges to SOC integration than the active CMOS and BJT devices. This is not surprising since modern digital IC designs are dominated as much, or more, by interconnectg characteristics than by active device properties. In any event, the co-integration of active and passive devices in RFIC design represents a serious design problem and an even more daunting manufacturing challenge..